==TestVhdlScript==
@ident=readme_VhdlScript

This example is got from practice: A FPGA-Design (''Field Programmable Gate Array'', hardware logik) is designed with VHDL (''Very High Speed Integrated Circuit Hardware Description Language''). The ports or registers of such an FPGA are disposed in the address range of the processor. 

The access to this registers are done in C programming language. 

Some registers, wich addresses are closed together, should be arranged in ,,struct,,-Definitions in the C-language. This ,,struct,, can be used in simulations without the hardware too, by definition of simple instances of this ,,struct,,s, maybe with a emulation of the FPGA-functionality. At most a simple emulation is proper, but a test script is able to use too.  

Registers, which are disposed in other address ranges, should be defined with another ,,struct,,. The access to this several ,,struct,,s shoud be done in the target system using macros, which contains the hardware adresses as constants. 

At first, the corresponding headerfile for C-access should be written manually. There may be used some helpers using a good editor: search'nreplace, column editor, regular expressions etc. But a little problem is: The addresses are not in the same step-width in any case, and may be not in order. A manual imaging may be fault-prone, any address should be look at carefully. But an algorithm can sort the entries and can test the address-steps in a simple way.

The creation of the ZBNF-syntax-script was done in estimate half an hour, including the recognition of the given content of the VHDL-input-data. The Java program to create the header-file was written in estimate 2 hours. The resulting header-file isn't able to use without any post processing. It should adapted in the embedded software, but the ,,struct,,-definitions are correct. The Java-programm may be improved if further requirements are known. At example the registers with same name but incremented number at end-of-name may be imaged as an array.

The manual creation of the header-file can't be done in this 3 hours, the input data were more complex as here shown (the example is shortened). 

'''The example contains''':

* ,,srcJava,,: Directory with java-source ,,org/vishia/zbnf/example/vhdlScript/Vhdl2Header.java,, and [[!srcJava/_make]]

* ,,VhdlScript2Header.jar,, ready-to-run compiled sources from srcJava

* ,,clean_results.bat,,, ,,clean_results.sh,,: helper to clean.

* ,,srcJava/_make/_makejar_VhdlScript.jz.bat,,: JZcmd script to compile the sources and create the jar-file. NOTE: See ,,zbnfjax/batch_template/jzcmd.bat,, or ,,zbnfjax/linux_startscript_template/jzcmd,, for jzcmd invocation.

* ,,runConversion.bat,,, ,,runConversion.sh,,: Windows-batch file and Unix-shell-script to run the program: parse and create header.

* ,,vhdl.zbnf,,: Syntax of the vhdl-file.

* ,,ADDRESSES.vhd,,: Inputfile VHDL-Script.

* ,,result.reference/Fpga.h,,: The expected result: Test result with changed conditions should be compared with it.

* ,,result,, empty directory for ,,result/fpga.h,,
 