--=============================================================================
-- PROJECT      :   example Control / SPGM-FPGA
--=============================================================================


--=============================================================================
-- MODUL NAME   :   DEFINES / PACKAGE
-- FILENAME     :   addresses.vhd
-------------------------------------------------------------------------------
-- DESCRIPTION  :   Contains neccesary Definitions of 
--                  Constants
--
--
--=============================================================================


--=============================================================================
-------------------------------------------------------------------------------
-- REVISIONS    :
-------------------------------------------------------------------------------
--   DATE       VERSION    AUTHOR          DESCRIPTION
-------------------------------------------------------------------------------
-- 29.11.2006    0.1     J.Heardman     First Version
-- 05.12.2006    0.11    J.Heardman     Started with Address-Decoder
-- 25.04.2007    0.12    J.Heardman     Add CB_IRQ_MODE-Adresse
-- 12.11.2009    0.13    B.Huygens      Add registers
--
-------------------------------------------------------------------------------
--=============================================================================

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_misc.all;


package JH_ADDRESSES is

    subtype     EFFECTIVE_ADDR_BUS      is  std_logic_vector(23 downto 0);
    subtype     BITSTEUER_ADDR_BUS      is  std_logic_vector(15 downto 0);
    subtype     BITSTEUER_REG_WIDTH     is  integer range 1 to 16;
    
    constant    BITCTRL_BASE            :   EFFECTIVE_ADDR_BUS := x"000000";

    constant    STAT_REG_BASE           :   EFFECTIVE_ADDR_BUS := x"002000";
    constant    DIG_IO_STAT             :   EFFECTIVE_ADDR_BUS := x"002000";
    constant    SYS_NOK_REASON_FIRST    :   EFFECTIVE_ADDR_BUS := x"00206C";
    
    constant    STATUS_RECEIVE_FAIL_COUNT_PM1           :   EFFECTIVE_ADDR_BUS := x"003000";
    constant    STATUS_RECEIVE_FAIL_COUNT_PM2           :   EFFECTIVE_ADDR_BUS := x"003004";
    constant    STATUS_RECEIVE_FAIL_COUNT_PM3           :   EFFECTIVE_ADDR_BUS := x"003008";
    constant    STATUS_RECEIVE_FAIL_COUNT_PM4           :   EFFECTIVE_ADDR_BUS := x"00300C";
    constant    STATUS_RECEIVE_FAIL_COUNT_PM5           :   EFFECTIVE_ADDR_BUS := x"003010";
    constant    STATUS_RECEIVE_FAIL_COUNT_PM6           :   EFFECTIVE_ADDR_BUS := x"003014";
    constant    STATUS_RECEIVE_FAIL_COUNT_PM7           :   EFFECTIVE_ADDR_BUS := x"003018";

    constant    TRIGGER_RECEIVE_FAIL_COUNT_PM1          :   EFFECTIVE_ADDR_BUS := x"003440";
    constant    TRIGGER_RECEIVE_FAIL_COUNT_PM2          :   EFFECTIVE_ADDR_BUS := x"003444";
    constant    TRIGGER_RECEIVE_FAIL_COUNT_PM3          :   EFFECTIVE_ADDR_BUS := x"003448";
    constant    TRIGGER_RECEIVE_FAIL_COUNT_PM4          :   EFFECTIVE_ADDR_BUS := x"00344C";
    constant    TRIGGER_RECEIVE_FAIL_COUNT_PM5          :   EFFECTIVE_ADDR_BUS := x"003450";
    constant    TRIGGER_RECEIVE_FAIL_COUNT_PM6          :   EFFECTIVE_ADDR_BUS := x"003454";
    constant    TRIGGER_RECEIVE_FAIL_COUNT_PM7          :   EFFECTIVE_ADDR_BUS := x"003458";


    constant    CTRL_REG_BASE           :   EFFECTIVE_ADDR_BUS := x"004000";
    constant    EN_DEBUG_TEST           :   EFFECTIVE_ADDR_BUS := x"004000";
    constant    DEBUG_TEST_STAT         :   EFFECTIVE_ADDR_BUS := x"004004";

    constant    HPIRQ_EN                :   EFFECTIVE_ADDR_BUS := x"004010";
    constant    HPIRQ_MSET              :   EFFECTIVE_ADDR_BUS := x"004014";
    constant    HPIRQ_MCLR              :   EFFECTIVE_ADDR_BUS := x"004018";
    constant    HPIRQ_QUIT              :   EFFECTIVE_ADDR_BUS := x"00401C";
    constant    LPIRQ_EN                :   EFFECTIVE_ADDR_BUS := x"004020";
    constant    LPIRQ_MSET              :   EFFECTIVE_ADDR_BUS := x"004024";
    constant    LPIRQ_MCLR              :   EFFECTIVE_ADDR_BUS := x"004028";
    constant    LPIRQ_QUIT              :   EFFECTIVE_ADDR_BUS := x"00402C";

    constant    RW_REG_BASE             :   EFFECTIVE_ADDR_BUS := x"005000";
    constant    TMM_SYSTEM_CLOCK        :   EFFECTIVE_ADDR_BUS := x"005000";
    constant    CURRBASETIME_LOW        :   EFFECTIVE_ADDR_BUS := x"005004";
    constant    CURRBASETIME_HIGH       :   EFFECTIVE_ADDR_BUS := x"005008";
    constant    UM_RX_GEN_INT_COUNT     :   EFFECTIVE_ADDR_BUS := x"00500C";
    constant    COL_TIME                :   EFFECTIVE_ADDR_BUS := x"005010";
    constant    REDU_DATA_SIZE          :   EFFECTIVE_ADDR_BUS := x"005014";

    constant    TRGBUF                  :   EFFECTIVE_ADDR_BUS := x"006000";

    constant    MI_TRGMSK_STAT          :   EFFECTIVE_ADDR_BUS := x"008000";

    constant    MI_SHORT_BLOCK_TIME     :   EFFECTIVE_ADDR_BUS := x"00A000";



    -- Bitsteuerbereich:
    constant    POWERON_STAT            :   BITSTEUER_ADDR_BUS := x"0000";
    constant    BOARD_NUMBER               :   BITSTEUER_ADDR_BUS := x"0001";
    constant    RACK_NUMBER             :   BITSTEUER_ADDR_BUS := x"0002";
    constant    STATION_ID              :   BITSTEUER_ADDR_BUS := x"0003";
    constant    MMS_CONFIG              :   BITSTEUER_ADDR_BUS := x"0004";

    constant    FPGA_INIT_FINISHED      :   BITSTEUER_ADDR_BUS := x"000C";

    constant    COMMON_ACCU_CLR         :   BITSTEUER_ADDR_BUS := x"000D";
    constant    SET_SYS_NOK_STAT        :   BITSTEUER_ADDR_BUS := x"000E";
    constant    RX_FAIL_CNT_CLR         :   BITSTEUER_ADDR_BUS := x"000F";
    constant    TYPE_DOUT_1             :   BITSTEUER_ADDR_BUS := x"0010";
    constant    TYPE_DOUT_2             :   BITSTEUER_ADDR_BUS := x"0011";
    constant    TYPE_DOUT_3             :   BITSTEUER_ADDR_BUS := x"0012";
    constant    TYPE_DOUT_4             :   BITSTEUER_ADDR_BUS := x"0013";
    constant    TYPE_DOUT_5             :   BITSTEUER_ADDR_BUS := x"0014";
    constant    TYPE_DOUT_6             :   BITSTEUER_ADDR_BUS := x"0015";
    constant    TYPE_DOUT_7             :   BITSTEUER_ADDR_BUS := x"0016";
    constant    TYPE_DOUT_8             :   BITSTEUER_ADDR_BUS := x"0017";

    constant    SET_DOUT_1              :   BITSTEUER_ADDR_BUS := x"0018";
    constant    SET_DOUT_2              :   BITSTEUER_ADDR_BUS := x"0019";
    constant    SET_DOUT_3              :   BITSTEUER_ADDR_BUS := x"001A";
    constant    SET_DOUT_4              :   BITSTEUER_ADDR_BUS := x"001B";
    constant    SET_DOUT_5              :   BITSTEUER_ADDR_BUS := x"001C";
    constant    SET_DOUT_6              :   BITSTEUER_ADDR_BUS := x"001D";
    constant    SET_DOUT_7              :   BITSTEUER_ADDR_BUS := x"001E";
    constant    SET_DOUT_8              :   BITSTEUER_ADDR_BUS := x"001F";

    constant    SET_TEST_0              :   BITSTEUER_ADDR_BUS := x"0020";
    constant    SET_TEST_1              :   BITSTEUER_ADDR_BUS := x"0021";
    constant    SET_TEST_2              :   BITSTEUER_ADDR_BUS := x"0022";
    constant    SET_TEST_3              :   BITSTEUER_ADDR_BUS := x"0023";
    constant    SET_TEST_4              :   BITSTEUER_ADDR_BUS := x"0024";
    constant    SET_TEST_5              :   BITSTEUER_ADDR_BUS := x"0025";
    constant    SET_TEST_6              :   BITSTEUER_ADDR_BUS := x"0026";
    constant    SET_TEST_7              :   BITSTEUER_ADDR_BUS := x"0027";

    constant    EN_CTRLRX1_CB1          :   BITSTEUER_ADDR_BUS := x"0030";
    constant    EN_CTRLRX2_CB1          :   BITSTEUER_ADDR_BUS := x"0031";
    constant    EN_CTRLRX1_CB2          :   BITSTEUER_ADDR_BUS := x"0032";
    constant    EN_CTRLRX2_CB2          :   BITSTEUER_ADDR_BUS := x"0033";



    -- Registerbreiten:
    constant    POWERON_STAT_WIDTH          :   BITSTEUER_REG_WIDTH := 1;
    constant    BOARD_NUMBER_WIDTH             :   BITSTEUER_REG_WIDTH := 1;
    constant    RACK_NUMBER_WIDTH           :   BITSTEUER_REG_WIDTH := 3;
    constant    STATION_ID_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    MMS_CONFIG_WIDTH            :   BITSTEUER_REG_WIDTH := 3;

    constant    FPGA_INIT_FINISHED_WIDTH    :   BITSTEUER_REG_WIDTH := 1;

    constant    COMMON_ACCU_CLR_WIDTH       :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_SYS_NOK_STAT_WIDTH      :   BITSTEUER_REG_WIDTH := 16;
    constant    RX_FAIL_CNT_CLR_WIDTH       :   BITSTEUER_REG_WIDTH := 1;
    constant    TYPE_DOUT_1_WIDTH           :   BITSTEUER_REG_WIDTH := 2;
    constant    TYPE_DOUT_2_WIDTH           :   BITSTEUER_REG_WIDTH := 2;
    constant    TYPE_DOUT_3_WIDTH           :   BITSTEUER_REG_WIDTH := 2;
    constant    TYPE_DOUT_4_WIDTH           :   BITSTEUER_REG_WIDTH := 2;
    constant    TYPE_DOUT_5_WIDTH           :   BITSTEUER_REG_WIDTH := 2;
    constant    TYPE_DOUT_6_WIDTH           :   BITSTEUER_REG_WIDTH := 2;
    constant    TYPE_DOUT_7_WIDTH           :   BITSTEUER_REG_WIDTH := 2;
    constant    TYPE_DOUT_8_WIDTH           :   BITSTEUER_REG_WIDTH := 2;

    constant    SET_DOUT_1_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_DOUT_2_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_DOUT_3_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_DOUT_4_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_DOUT_5_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_DOUT_6_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_DOUT_7_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_DOUT_8_WIDTH            :   BITSTEUER_REG_WIDTH := 1;

    constant    SET_TEST_0_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_TEST_1_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_TEST_2_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_TEST_3_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_TEST_4_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_TEST_5_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_TEST_6_WIDTH            :   BITSTEUER_REG_WIDTH := 1;
    constant    SET_TEST_7_WIDTH            :   BITSTEUER_REG_WIDTH := 1;

    constant    EN_CTRLRX1_CB1_WIDTH        :   BITSTEUER_REG_WIDTH := 1;
    constant    EN_CTRLRX2_CB1_WIDTH        :   BITSTEUER_REG_WIDTH := 1;
    constant    EN_CTRLRX1_CB2_WIDTH        :   BITSTEUER_REG_WIDTH := 1;
    constant    EN_CTRLRX2_CB2_WIDTH        :   BITSTEUER_REG_WIDTH := 1;


end package ADDRESSES;
--

-- Definitionen:
package body ADDRESSES is

end package body ADDRESSES;
-- End of File
